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This should load all the relevant sets and parameters. When I try to solve this model, I encounter different memory errors. I either see: Memory allocation error Memory allocation error: while assigning "xxx" bytes Are there any steps that I could take with regards to the index domain of some parameters, constraints or variables, such that this model becomes solvable? Data layer libraries. How-To Guides. Advanced Concepts. Threading in WorkManager. App entry points. App shortcuts.
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Various other optimized data processing strategies are implemented to facilitate the high speed reading and processing of data from CD-ROM disks. The DVD-ROM sector-encoding flow consequently is described to provide a background for understanding the improvements of the present invention. The original compact disk standard was promulgated and eventually adopted for the distribution of digitized audio. When such a disk is played back, the pits on the surface of the disk are sensed by a laser pickup head and converted to a serial bit stream.
The bit stream is then demodulated and split to thirty-two byte frames that are processed by a C1 error corrector.
The C1 error correction codes are 32, 28 Reed-Solomon codes over the Galois field GF 2 8 and can typically correct two errors in each frame. After the C1 corrections, the four C1 parity bytes are discarded, the other twenty-eight bytes in the frame are de-interleaved for the first time and the bytes are sent to the C2 error corrector.
This first de-interleaving mixes data bytes from two adjacent C1-corrected frames to form the twenty-eight byte input to the C2 error corrector. The C2 error correction codes are 28, 24 Reed-Solomon codes over GF 2 8 and can typically correct two errors in each frame. After C2 error correction, the four C2 parity bytes are discarded and the remaining twenty-four bytes are de-interleaved for a second time. The second de-interleaving mixes data bytes from twenty-four different C2 frames to generate twenty-four bytes of audio data, organized as six couples of sixteen-bit left-channel and sixteen-bit right-channel digital audio data.
C1 and C2 error corrections reduce the error rates of the digital audio data read from a disk. Furthermore, the data bit exchange accomplished in the first and second de-interleaving processes improves the playability of defective disks. When a scratch on a disk surface introduces a burst of errors, the erroneous data are de-interleaved into many different frames, thus reducing the number of errors per frame and increasing the probability of successful error corrections.
On the other hand, the inclusion of parity bytes for two layers of error correction codes greatly reduces the amount of data that can be stored on a disk. This third layer of error correction codes, sometimes called C3, is applied to byte frames or sectors extracted from the C1- and C2-corrected and twice de-interleaved data stream.
Note that the byte frame is different from the thirty-two byte and twenty-eight byte frames to which the C1 and C2 layers of error correction codes are applied. A thirty-two bit error detection code EDC is also encoded in CD-ROM sectors to provide a further data integrity check, generally in the form of a cyclic redundancy code.
The bits of the identification data and the ID error detection code IED together form a 6, 4 Reed-Solomon code, which is decoded to detect as well as to correct errors in the important ID data. Calculation of the EDC for each byte codeword is conventional and can be illustrated as follows. The four-bytes of EDC data are determined separately for each EDC codeword to cause the polynomial assembled according to Equation 1 to be evenly divisible by this check polynomial g x.
After EDC calculation, the main data are scrambled by exclusive-ORing the main data with a string of bytes selected according to the sector identity or position within a block or sector. Sixteen different addresses are assigned among sixteen main data sectors and each of the sixteen sectors is scrambled with a predetermined string of scrambling bytes.
Sixteen different scrambling strings are used corresponding to the sixteen different addresses. The sixteen scrambled data sectors are then grouped into an ECC block, which is encoded using a Reed-Solomon product code. To construct an ECC block, sixteen scrambled data sectors, each bytes by twelve rows, are concatenated to form a byte by row matrix, as shown in the upper-left portion of FIG.
Ten inner-code parity PI bytes are appended to each of the rows of Main Data to produce a , Reed-Solomon code. Finally, sixteen outer-code parity PO bytes are appended to each of the columns to produce a , Reed-Solomon code. The resulting ECC block is a row by byte matrix, where the rows are , Reed-Solomon codes called the inner codes, and the columns are , Reed-Solomon codes called the outer codes.
The data consisting of thirteen rows of bytes forming the ECC block after row interleave are collectively referred to as the recording sector.
An aspect of the present invention provides a method of correcting and detecting errors in a sector of data stored on an optical disk in a DVD format. These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. Aspects of the present invention can be better understood with reference to the drawings, described briefly below, which form a part of the present disclsure.
Preferred embodiments of the present invention provide methods and apparatus for more efficiently retrieving and processing data stored on an optical disk in a DVD format.
Generally, the retrieval and processing of data includes inner and outer code error correction for a Reed-Solomon product like code and an error detection process for evaluating an extent of errors in a sector of data.
For this device, the sector of data is encoded within a plurality of inner codes and parts of plural sectors encoded within each outer code. Methods according to the present invention include calculating an initial and generally also an intermediate error detection value for data within the sector.
The target for the error detection value is non-zero because the data within the sector is scrambled. If there is a match between the initial or intermediate error detection value, the sector can be presumed to be free of errors. Decisions as to whether error correction operations are to be made or how error correction operations are to be performed are then made on the basis of the knowledge that some or all of the sectors within a block of DVD-ROM are free of errors.
For example, inner code logic might perform an error correction operation on the data within the sector to generate an updated, intermediate error detection value in response to the error correction operation.
The intermediate error detection value is compared to a target error detection value to determine if errors are present in the sector. If there are no errors in the sector, the method might cause error correction to be skipped, discontinued or skipped in part.
Additional strategies for improving the speed and accuracy of retrieving and processing DVD data are explained below.
This discussion first illustrates the structure and operation of certain preferred embodiments of the present invention, with particular reference to the figures. Data are read from a DVD-ROM disk 10 using a laser beam in pick-up 12 to sense the reflectivity variations on the disk surface and generate a waveform that is amplified and digitized in digitizer 14 to provide the channel bit stream for the device.
If error correction and error detection on buffered sectors are completed successfully, the sectors can be transferred to the host interface bus 22 , which might be an IDE bus, with the transfer conducted through the host interface logic Generally the host interface bus 22 is a peripheral bus within a host computer, but other configurations are possible.
This discussion focuses on the processing of error correction codes and error detection codes within the DVD-ROM sector decoder and so does not address the conventional aspects of interfacing to a host computer. The error correction and error detection codes in DVD-ROM sectors and CD-ROM sectors work similarly—the error correction codes are used to detect and correct a limited number of errors present in the read out data.
The error detection codes provide a simple way to check whether the data bits within a read out data sector are all good or not. The P and Q vectors of CD-ROM format sectors are encoded for every sector, allowing error correction to start as soon as a sector is received. Whenever a DVD-ROM outer codeword is decoded, multiple errors in multiple sectors may be located and corrected for each codeword. It is possible to implement Reed-Solomon decoders that can correct up to ten errors in an inner code and up to sixteen errors in an outer code.
On the other hand, aspects of the present invention can be applied to implementations that can correct varying numbers of correctable errors, so the typical eight correctable errors per outer codeword implementation will be assumed in the following discussion.
Many arrangements of inner code correction, outer code correction and error detection function blocks are possible. One implementation that can be used to illustrate aspects of the present invention is shown in FIG. The figure shows a more detailed illustration of the interaction between the sector decoder 18 and the buffer memory 20 of FIG. The functions of the circuits shown in FIG. CRC Generator 32 : A cyclic redundancy code generator, which divides the input bitstream by a check polynomial to produce a remainder.
In general, the CRC generator 32 is a linear feedback shift register, or a modification of such a shift register. This thirty-two bit number is the initial EDC result for that sector.
In an alternate embodiment, the EDC file 34 might include thirty-two thirty-two-bit registers, with sixteen of the registers holding the initial or intermediate EDC remainders and a corresponding sixteen registers holding the target EDC remainder values representative of corrected or error free sectors. Buffer Memory 20 : A random access memory to which incoming read out data sectors are stored and later accessed for error corrections.
The buffer memory stores sectors of data awaiting correction, during correction and correct data awaiting transfer to the host computer. When the host computer requests or otherwise indicates it is prepared to receive data, the data are accessed from the buffer memory for transfer. Sector data are read from the buffer memory 20 and descrambled by the descrambler 38 before the data are transferred to a host interface bus 24 FIG.
Inner Code Error Correction Logic 40 : Reads inner codes of sectors from the buffer memory 20 for error correction, performs Reed-Solomon error correction on the inner codes and generates error correction information.
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